1. Field of the Invention
The present invention relates to a non-volatile semiconductor memory device. More particularly, it relates to a non-volatile semiconductor memory device such as an EEPROM (electrically erasable and programmable ROM), flash memory, or the like, in which each transistor having a two-layer gate structure with a control gate and a floating gate is constituted as a memory cell transistor, and to a method of writing data in the device.
2. Description of the Related Art
As a non-volatile semiconductor memory device of the above type, a flash memory is known. In a typical flash memory, a write processing is carried out by first executing an erase operation with respect to an object block of erasure and then executing a write operation.
In the erase operation, a write processing is carried out for a specific reason, prior to the erase processing, with respect to all of memory cell transistors in the object block of erasure. Also, after the erase processing, a verify processing is carried out for a specific reason, with respect to all of the memory cell transistors included in the object block of erasure.
Namely, the prior art flash memory has required the writing into all of the memory cell transistors in the object block of erasure before the erasure, and has required the verify processing after the erasure. As a result, a problem has been posed in that time required for the entire erase and write operation is relatively prolonged.
Note, the problem in the prior art will be explained later in detail in contrast with the preferred embodiments of the present invention.